Mixer Gain
Simulation in WinSPICE3.
In this note we show how we at Silicon
Devices simulate mixer gain using WinSPICE3, a generic netlist driven linear and
non-linear SPICE simulator. The netlists accompanying this note
(available from our website) may be modified
for use in other SPICE simulators however, some of the scripting used
may not translate.
By
definition, it is not possible to calculate mixer gain using an AC
(steady-state frequency domain) simulation as this is at one frequency
only, whereas a mixer generates multiple frequencies. It is
possible to use a TRAN (time domain) simulation followed by a fast
fourier transform to find the frequency components generated, but the
technique is very limited due to the relatively long time taken for the
fourier transform to run when compared to the time taken for the
transient simulation; also the technique tends to only be useful for
steady state cases and can be problematic for high power mixers where
the RF signal represents a significant part of the bias voltages
present.
Here, we show how by implementing the geometric identity Vpk=((cos(Vac))2+(sin(Vac))2)0.5 in the time domain, we remove the frequency dependence of the input and output power flow by "recovering" the waveform' s envelope at each port, allowing rapid calculation of input and output power; so allowing us to evaluate conversion gain, compression points etc in a manner more realistic than simple AC simulations and in a way consistent with pulsed RF signals used in digital data modulation schemes.
[return to
SDL design resources]
The SIN(...) source in
WinSPICE (and most other SPICE simulators) becomes a "cosine" source if
a delayed
by 3.PI/2. A sine and a cosine source can be used to generate
the complex input signals necessary to carry out the calculation,
however, it is more convenient to
use a transmission line with a delay of PI/4, then relabel the (real)
input as the cosine input and the transmission line output as the sine
input (representing the "imaginary" part of the input
signal) as this will allow us to calculate the output levels from the Device Under Test. Such a structure is also
useful for extracting the real
and imaginary part of the output time-domain waveform, particularly if
the DUT is an
output from an amplifier or mixer. The finite time delay does require
that we restrict the signal
at each port of the device under test to predominantly one frequency;
then we can
directly calculate the envelope of the signal at each of those ports
using Vpk=((cos(x))2+(sin(x))2)0.5.
By applying the time
delay to both input ports of the mixer,
each set to a delay of PI/2 of the predominant frequency at that
port,
plus a third delay of PI/2 of the expected output
frequency (either USB or LSB) at the output port, we can then
carry out the appropriate
calculation of power
gain (or conversion loss) of the mixer. Notice that generally, we
can only set this delay to one value. The schematic below
illustrates just one input port for the DUT, plus the output port:
- we see how the the output magnitude maybe calculated from the instantaneous values of the voltages at the input and output of the transmission line which will have a delay set relative to either the sum or difference of the two input frequencies. By running the WinSPICE3 netlist in the companion file MixerTest.zip, we see that this calculation can be very quick and the calculated output power for an ideal mixer is exact; that is, the technique is "perfect".
The DUT in the netlist needs a bit of explaining; to simplify the testbench we have used a complex "quad" which rejects one or the other side-band according to the phasing of port one against port two, so eliminating the need for a sideboard reject filter. Such a quad mixer can be useful in frequency doubling (the x and y inputs are connected together) to achieve frequency isolation between a VCO and a Power Amplifier, or in applications where one input frequency is reasonably low as in DAC baseband modulation, as the quad mixer will reject noise generated in the opposite sideband, without the need for narrowband high frequency filter.
Initially the netlist for the Complex Quad Mixer and its testbench may look very complicated; however they break down into five sections: two inputs (X and Y) each consisting of four phases: two differential In-phase and two Quadrature phased lines (ie I, Q, NI and NQ, or 0deg 90deg, 180deg, 270deg), a balanced output (Z) as in both schematics above, and the subcircuit of the mixer itself. A control script is also needed to run the simulations on the netlist, then calculate and present the output data in plot form.
The mixer implementation in the schematic above may (initially) look a little strange: addition or subtraction in the frequency domain convolves to multiplication in the time domain, so a simple multiplier (eg: one of the G sources in the netlist or the schematic above) will function as a frequency "mixer" (actually a frequency adder/subtractor). However if we were to use just a single multiplier stage we would see both upper and lower sidebands in the output (which as previously noted, would complicate the example circuit) so we would need to remove one of the sidebands to be able to fulfill the fixed time delay requirement at the output needed to make this technique work. Therefore, we have chosen here to implement the mixer as the Complex Quadrature Mixer in the schematic above in order to suppress the unwanted sideband needed to achieve just one predominant frequency component at the output, so allowing us to illustrate how the magnitude extraction technique works in a simple manner.
When we run the simulation, we see that the output level becomes accurate as soon as the input and output delays have propagated through the transmission lines thus:
The top plot shows the x and y complex input signals and their complements as well as the differential output signals. The second plot shows the input and output cos( ) and sin( ) signals across each of the delay lines. The third plot shows shows the output converted to power gain - the point of interest in the last plot is that it shows the output level is accurate as soon as the cos(z) output has propagated through td(z) to the sin(z) output; this means that we can potentially find a mixers gain accurately after one quarter of a wave of the lowest frequency present (at either input or output).
As "an exercise for the reader" change the netlist parameter, LSB to 0, then re-run the simulation for yourself to see that the output level for the USB is accurate in one quarter cycle of the both of the lower of the two input frequencies plus the output delay (~ 4us).
In many digital communication systems quad-mixers are used to simplify on-chip filtering requirements by eliminating the need for image rejection filters and sideband reject filters. Discussion of their many possible implementations is beyond the scope of this note, however we see from the testbench in the above file that by switching two of the outputs from two of the multipliers, we can select either USB or LSB at the output cancelling which ever of the other sideband not selected.
[the real interesting part (an actual
circuit) is coming soon
... please email if you would
like an early copy, otherwise check back occasionally to see it when it
is available!]
In this note, we have discussed using a time delay to extract
the complex values for a single frequency at a node of interest,
enabled us to calculate the instantaneous power levels at that node,
which
then may be applied to the calculation of input reflection coefficient,
input
compression point and instantaneous power gain for a mixer.
We have shown the technique to be perfect once the
"initial
conditions" (ie delays
through the transmission lines) have passed. The
time-domain simulation
techniques presented here may usefully be extended to pulsed power
amplifiers and investigation of mixer compression points.
The test-bench used in the above examples maybe downloaded at MixerTest.zip. You may also wish to contact Technical@SiliconDevices.com for an updated copy of the testbench which is subject to continuous development when simulating our IPcells throughout their design cycle. If you wish to explore time domain simulation of mixers (or power amplifiers) further please contact the author.