| Tools SDL Support: We recommend WinSPICE3. Windows based, WinSPICE features a built in scripting language running under a Unix like shell where it remains resident, enabling interactive use of the simulator. The ability to write scripts to simulate over TPV (temperature, process and voltage) is pivotal to Analogue and RF circuit ASIC design. To gain an idea of what WinSPICE is capable of take a look at the Winspice Users Group then download WinSPICE and the example scripts from our Design Support page. WinLASI for DXFand GDSII layer manipulation as well as IP cell importation and conversion. It will also do schematic entry, layout editing and netlist extraction (with appropriately prepared cell libraries) for both IC design as well as PCB design. Read the introductory note "Starting WinLASI 7v02", download WinLASI and find WinLASI support through Jake Baker's excellent range of books on IC design. StreamVista from Semigy enables GDSII files to be viewed directly without the need for file format conversion. A layer file for each technology node must be created. The free evaluation version is no longer available, however an older version maybe downloaded here. We use Magic for IC layout and DRC checking. It is also extremly useful for SPICE netlist extraction from layout as it can do so without prior knowledge of the original schematic. It relies on the use and understanding of some very complex technology files. Runs under Cygwin. Download Magic here. Join the Magic User Group to gain some excellent insights into layout challenges. Other Tools of Interest: We use the ActiveFileCompare tool to compare netlists extracted from layout against those from the original schematics. LTspice includes a schematic entry tool linked to a proprietry version of spice and is is capable of reading schematics from Cohesion. Uses some non-standard primitives to enable faster SMPS simulations than is usual for Standard Spice simulators. You may Download LTspice here. The LTspice User Group is extremely active. Electric may be used for schematic entry then SPICE netlist extraction from that schematic; Electric Users Group. Silos Verilog for Digital System Design can be found on the CD with the book "Verilog Quickstart" by James M Lee. Recommended Sites: The 700 Series 20V Bipolar Array Design Manual offers some interesting prototyping options as well as giving an intuitive feel for device parameter changes with environment and process as well as some basic layout hints. Take a look at Designing Analog Chips. The Designer's Guide Community gives an excellent list of books for practicing analog, RF, and mixed-signal designers. |
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